CMOS Energy Efficiency from harvested data - Circuit Opportunities for Machine Learning

Azeez Bhavnagarwala, Principal, Metis Microsystems, LLC, USA

Biography :

Azeez Bhavnagarwala received his B.S. [cum laude] in Electrical Engineering from RPI in Troy NY and the ETH Zurich in Switzerland. He received his Ph.D. - also in Electrical Engineering from Georgia Tech, Atlanta GA. He worked as a Research Scientist at the IBM TJ Watson Research Center, in Yorktown Heights NY, at AMD Research and at ARM Research during the past 16 years on ultra-low power CMOS circuits and technology development with a focus on embedded memories. He served on the TPC of the ISSCC and the VLSI Circuits Symp, has given over 20 invited presentations, is inventor of over 30 issued and pending patents on Low Power CMOS SoC Ckts, Low voltage and near threshold CMOS Ckt design, CMOS process Variability, Ultra-Fast Parametric Testing and on Harvesting energy from data. He received an Outstanding Innovation Award from IBM, a Best Paper Award from the SRC and also Supplementary Patent awards for Circuit IP developed at IBM Research. He is currently at Metis Microsystems - a company he founded in 2017 that develops & licenses circuit IP enabling use of transient Data as a source of energy to improve chip energy efficiency.